softmmu: Pass env to load/store routines.
Also define __ldl_mmu et al. in cputlb.c because the TCG-generated
code still calls these directly. Note that these will go once we
actually upgrade TCG to a more recent version.
Change-Id: Id1983a9f16f64a28c089e458c79f74ac065bf66c
diff --git a/cputlb.c b/cputlb.c
index e756596..1cb3475 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -362,7 +362,6 @@
#define MMUSUFFIX _cmmu
#undef GETPC
#define GETPC() 0
-#define env cpu_single_env
#define SOFTMMU_CODE_ACCESS
#define SHIFT 0
@@ -377,4 +376,35 @@
#define SHIFT 3
#include "exec/softmmu_template.h"
-#undef env
+// TODO(digit): Remove this once TCG is upgraded.
+uint8_t REGPARM __ldb_mmu(target_ulong addr, int mmu_idx) {
+ return helper_ldb_mmu(cpu_single_env, addr, mmu_idx);
+}
+
+void REGPARM __stb_mmu(target_ulong addr, uint8_t val, int mmu_idx) {
+ return helper_stb_mmu(cpu_single_env, addr, val, mmu_idx);
+}
+
+uint16_t REGPARM __ldw_mmu(target_ulong addr, int mmu_idx) {
+ return helper_ldw_mmu(cpu_single_env, addr, mmu_idx);
+}
+
+void REGPARM __stw_mmu(target_ulong addr, uint16_t val, int mmu_idx) {
+ return helper_stw_mmu(cpu_single_env, addr, val, mmu_idx);
+}
+
+uint32_t REGPARM __ldl_mmu(target_ulong addr, int mmu_idx) {
+ return helper_ldl_mmu(cpu_single_env, addr, mmu_idx);
+}
+
+void REGPARM __stl_mmu(target_ulong addr, uint32_t val, int mmu_idx) {
+ return helper_stl_mmu(cpu_single_env, addr, val, mmu_idx);
+}
+
+uint64_t REGPARM __ldq_mmu(target_ulong addr, int mmu_idx) {
+ return helper_ldq_mmu(cpu_single_env, addr, mmu_idx);
+}
+
+void REGPARM __stq_mmu(target_ulong addr, uint64_t val, int mmu_idx) {
+ return helper_stq_mmu(cpu_single_env, addr, val, mmu_idx);
+}
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 0435bd7..d60ee5e 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -420,7 +420,6 @@
#define ACCESS_TYPE (NB_MMU_MODES + 1)
#define MEMSUFFIX _code
-#define env cpu_single_env
#define DATA_SIZE 1
#include "exec/softmmu_header.h"
@@ -436,7 +435,6 @@
#undef ACCESS_TYPE
#undef MEMSUFFIX
-#undef env
#endif
diff --git a/include/exec/softmmu_defs.h b/include/exec/softmmu_defs.h
index e38bb75..4fce005 100644
--- a/include/exec/softmmu_defs.h
+++ b/include/exec/softmmu_defs.h
@@ -19,4 +19,22 @@
uint64_t REGPARM __ldq_cmmu(target_ulong addr, int mmu_idx);
void REGPARM __stq_cmmu(target_ulong addr, uint64_t val, int mmu_idx);
+uint8_t helper_ldb_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
+void helper_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val, int mmu_idx);
+uint16_t helper_ldw_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
+void helper_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val, int mmu_idx);
+uint32_t helper_ldl_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
+void helper_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val, int mmu_idx);
+uint64_t helper_ldq_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
+void helper_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, int mmu_idx);
+
+uint8_t helper_ldb_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
+void helper_stb_cmmu(CPUArchState *env, target_ulong addr, uint8_t val, int mmu_idx);
+uint16_t helper_ldw_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
+void helper_stw_cmmu(CPUArchState *env, target_ulong addr, uint16_t val, int mmu_idx);
+uint32_t helper_ldl_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
+void helper_stl_cmmu(CPUArchState *env, target_ulong addr, uint32_t val, int mmu_idx);
+uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
+void helper_stq_cmmu(CPUArchState *env, target_ulong addr, uint64_t val, int mmu_idx);
+
#endif
diff --git a/include/exec/softmmu_header.h b/include/exec/softmmu_header.h
index 0e17a5c..70ad638 100644
--- a/include/exec/softmmu_header.h
+++ b/include/exec/softmmu_header.h
@@ -93,7 +93,7 @@
mmu_idx = CPU_MMU_INDEX;
if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
- res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
+ res = glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(env, addr, mmu_idx);
} else {
uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
res = glue(glue(ld, USUFFIX), _raw)(hostaddr);
@@ -114,7 +114,7 @@
mmu_idx = CPU_MMU_INDEX;
if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
- res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
+ res = (DATA_STYPE)glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(env, addr, mmu_idx);
} else {
uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
res = glue(glue(lds, SUFFIX), _raw)(hostaddr);
@@ -140,7 +140,7 @@
mmu_idx = CPU_MMU_INDEX;
if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
- glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
+ glue(glue(helper_st, SUFFIX), MMUSUFFIX)(env, addr, v, mmu_idx);
} else {
uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
glue(glue(st, SUFFIX), _raw)(hostaddr, v);
diff --git a/include/exec/softmmu_template.h b/include/exec/softmmu_template.h
index 0b84251..7aee20e 100644
--- a/include/exec/softmmu_template.h
+++ b/include/exec/softmmu_template.h
@@ -67,10 +67,12 @@
#include "android/qemu/memcheck/memcheck_api.h"
#endif // CONFIG_ANDROID_MEMCHECK && !OUTSIDE_JIT && !SOFTMMU_CODE_ACCESS
-static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
+static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env,
+ target_ulong addr,
int mmu_idx,
uintptr_t retaddr);
-static inline DATA_TYPE glue(io_read, SUFFIX)(hwaddr physaddr,
+static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState *env,
+ hwaddr physaddr,
target_ulong addr,
uintptr_t retaddr)
{
@@ -100,8 +102,9 @@
}
/* handle all cases except unaligned access which span two pages */
-DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
- int mmu_idx)
+DATA_TYPE glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env,
+ target_ulong addr,
+ int mmu_idx)
{
DATA_TYPE res;
int index;
@@ -124,7 +127,7 @@
goto do_unaligned_access;
retaddr = GETPC();
ioaddr = env->iotlb[mmu_idx][index];
- res = glue(io_read, SUFFIX)(ioaddr, addr, retaddr);
+ res = glue(io_read, SUFFIX)(env, ioaddr, addr, retaddr);
} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
/* This is not I/O access: do access verification. */
#ifdef CONFIG_ANDROID_MEMCHECK_MMU
@@ -143,7 +146,7 @@
#ifdef ALIGNED_ONLY
do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
#endif
- res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr,
+ res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(env, addr,
mmu_idx, retaddr);
} else {
#ifdef CONFIG_ANDROID_MEMCHECK_MMU
@@ -193,7 +196,8 @@
}
/* handle all unaligned cases */
-static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
+static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env,
+ target_ulong addr,
int mmu_idx,
uintptr_t retaddr)
{
@@ -211,15 +215,15 @@
if ((addr & (DATA_SIZE - 1)) != 0)
goto do_unaligned_access;
ioaddr = env->iotlb[mmu_idx][index];
- res = glue(io_read, SUFFIX)(ioaddr, addr, retaddr);
+ res = glue(io_read, SUFFIX)(env, ioaddr, addr, retaddr);
} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
do_unaligned_access:
/* slow unaligned access (it spans two pages) */
addr1 = addr & ~(DATA_SIZE - 1);
addr2 = addr1 + DATA_SIZE;
- res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1,
+ res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(env, addr1,
mmu_idx, retaddr);
- res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2,
+ res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(env, addr2,
mmu_idx, retaddr);
shift = (addr & (DATA_SIZE - 1)) * 8;
#ifdef TARGET_WORDS_BIGENDIAN
@@ -244,12 +248,14 @@
#ifndef SOFTMMU_CODE_ACCESS
-static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr,
+static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(CPUArchState *env,
+ target_ulong addr,
DATA_TYPE val,
int mmu_idx,
uintptr_t retaddr);
-static inline void glue(io_write, SUFFIX)(hwaddr physaddr,
+static inline void glue(io_write, SUFFIX)(CPUArchState *env,
+ hwaddr physaddr,
DATA_TYPE val,
target_ulong addr,
uintptr_t retaddr)
@@ -277,9 +283,10 @@
#endif /* SHIFT > 2 */
}
-void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr,
- DATA_TYPE val,
- int mmu_idx)
+void glue(glue(helper_st, SUFFIX), MMUSUFFIX)(CPUArchState *env,
+ target_ulong addr,
+ DATA_TYPE val,
+ int mmu_idx)
{
hwaddr ioaddr;
target_ulong tlb_addr;
@@ -299,7 +306,7 @@
goto do_unaligned_access;
retaddr = GETPC();
ioaddr = env->iotlb[mmu_idx][index];
- glue(io_write, SUFFIX)(ioaddr, val, addr, retaddr);
+ glue(io_write, SUFFIX)(env, ioaddr, val, addr, retaddr);
} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
/* This is not I/O access: do access verification. */
#ifdef CONFIG_ANDROID_MEMCHECK_MMU
@@ -318,7 +325,7 @@
#ifdef ALIGNED_ONLY
do_unaligned_access(env, addr, 1, mmu_idx, retaddr);
#endif
- glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val,
+ glue(glue(slow_st, SUFFIX), MMUSUFFIX)(env, addr, val,
mmu_idx, retaddr);
} else {
#ifdef CONFIG_ANDROID_MEMCHECK_MMU
@@ -368,7 +375,8 @@
}
/* handles all unaligned cases */
-static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr,
+static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(CPUArchState *env,
+ target_ulong addr,
DATA_TYPE val,
int mmu_idx,
uintptr_t retaddr)
@@ -386,7 +394,7 @@
if ((addr & (DATA_SIZE - 1)) != 0)
goto do_unaligned_access;
ioaddr = env->iotlb[mmu_idx][index];
- glue(io_write, SUFFIX)(ioaddr, val, addr, retaddr);
+ glue(io_write, SUFFIX)(env, ioaddr, val, addr, retaddr);
} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
do_unaligned_access:
/* XXX: not efficient, but simple */
@@ -394,10 +402,12 @@
* previous page from the TLB cache. */
for(i = DATA_SIZE - 1; i >= 0; i--) {
#ifdef TARGET_WORDS_BIGENDIAN
- glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)),
+ glue(slow_stb, MMUSUFFIX)(env,
+ addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)),
mmu_idx, retaddr);
#else
- glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8),
+ glue(slow_stb, MMUSUFFIX)(env,
+ addr + i, val >> (i * 8),
mmu_idx, retaddr);
#endif
}
diff --git a/softmmu_outside_jit.c b/softmmu_outside_jit.c
deleted file mode 100644
index e2aa1b3..0000000
--- a/softmmu_outside_jit.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/* Copyright (C) 2007-2009 The Android Open Source Project
-**
-** This software is licensed under the terms of the GNU General Public
-** License version 2, as published by the Free Software Foundation, and
-** may be copied, distributed, and modified under those terms.
-**
-** This program is distributed in the hope that it will be useful,
-** but WITHOUT ANY WARRANTY; without even the implied warranty of
-** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-** GNU General Public License for more details.
-*/
-
-/*
- * Contains SOFTMMU macros expansion for ldx_user and stx_user routines used
- * outside of JIT. The issue is that regular implementation of these routines
- * assumes that pointer to CPU environment is stored in ebp register, which
- * is true for calls made inside JIT, but is not necessarily true for calls
- * made outside of JIT. The way SOFTMMU macros are expanded in this header
- * enforces ldx/stx routines to use CPU environment stored in cpu_single_env
- * variable.
- */
-
-#include "qemu-common.h"
-#include "cpu.h"
-#include "exec/exec-all.h"
-
-#define OUTSIDE_JIT
-#define MMUSUFFIX _outside_jit
-#undef GETPC
-#define GETPC() NULL
-#define env cpu_single_env
-#define ACCESS_TYPE 1
-#define CPU_MMU_INDEX (cpu_mmu_index(env))
-
-#define SHIFT 0
-#include "exec/softmmu_template.h"
-
-#define SHIFT 1
-#include "exec/softmmu_template.h"
-
-#define SHIFT 2
-#include "exec/softmmu_template.h"
-
-#define SHIFT 3
-#include "exec/softmmu_template.h"
-
-#undef CPU_MMU_INDEX
-#undef ACCESS_TYPE
-#undef env
-#undef MMUSUFFIX
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index 6400baf..3a62b39 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -56,7 +56,6 @@
#include "exec/softmmu_exec.h"
#define MMUSUFFIX _mmu
-#define env cpu_single_env
#define SHIFT 0
#include "exec/softmmu_template.h"
@@ -70,8 +69,6 @@
#define SHIFT 3
#include "exec/softmmu_template.h"
-#undef env
-
/* try to fill the TLB and return an exception if error. If retaddr is
NULL, it means that the function was called in C code (i.e. not
from generated code or from helper.c) */
@@ -470,14 +467,14 @@
#define STQ(addr, val) stq(addr, val)
#else
int user = cpu_mmu_index(env);
-#define LDB(addr) slow_ldb_mmu(addr, user, GETPC())
-#define LDW(addr) slow_ldw_mmu(addr, user, GETPC())
-#define LDL(addr) slow_ldl_mmu(addr, user, GETPC())
-#define LDQ(addr) slow_ldq_mmu(addr, user, GETPC())
-#define STB(addr, val) slow_stb_mmu(addr, val, user, GETPC())
-#define STW(addr, val) slow_stw_mmu(addr, val, user, GETPC())
-#define STL(addr, val) slow_stl_mmu(addr, val, user, GETPC())
-#define STQ(addr, val) slow_stq_mmu(addr, val, user, GETPC())
+#define LDB(addr) slow_ldb_mmu(env, addr, user, GETPC())
+#define LDW(addr) slow_ldw_mmu(env, addr, user, GETPC())
+#define LDL(addr) slow_ldl_mmu(env, addr, user, GETPC())
+#define LDQ(addr) slow_ldq_mmu(env, addr, user, GETPC())
+#define STB(addr, val) slow_stb_mmu(env, addr, val, user, GETPC())
+#define STW(addr, val) slow_stw_mmu(env, addr, val, user, GETPC())
+#define STL(addr, val) slow_stl_mmu(env, addr, val, user, GETPC())
+#define STQ(addr, val) slow_stq_mmu(env, addr, val, user, GETPC())
#endif
static const struct {
int nregs;
diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
index b08c533..b878e5b 100644
--- a/target-i386/op_helper.c
+++ b/target-i386/op_helper.c
@@ -4912,7 +4912,6 @@
#if !defined(CONFIG_USER_ONLY)
#define MMUSUFFIX _mmu
-#define env cpu_single_env
#define SHIFT 0
#include "exec/softmmu_template.h"
@@ -4926,7 +4925,6 @@
#define SHIFT 3
#include "exec/softmmu_template.h"
-#undef env
#endif
#if !defined(CONFIG_USER_ONLY)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 48c1d52..dddcabc 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -2069,8 +2069,6 @@
target_ulong addr, int is_write,
int is_user, uintptr_t retaddr);
-#define env cpu_single_env
-
#define MMUSUFFIX _mmu
#define ALIGNED_ONLY
@@ -2086,8 +2084,6 @@
#define SHIFT 3
#include "exec/softmmu_template.h"
-#undef env
-
static void do_unaligned_access(CPUMIPSState *env, target_ulong addr,
int is_write, int is_user, uintptr_t retaddr)
{
