Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-peter' into staging
QOM CPUState and X86CPU
* Further QOM'ification of CPU initialization
* Propagation of CPUState arguments and elimination of ENV_GET_CPU() usage
* cpu_set_pc() abstraction
* CPUClass::disas_set_info() hook
# gpg: Signature made Thu Jul 9 14:23:12 2015 BST using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg: aka "Andreas Färber <afaerber@suse.com>"
* remotes/afaerber/tags/qom-cpu-for-peter: (22 commits)
disas: cris: QOMify target specific disas setup
disas: cris: Fix 0 buffer length case
disas: microblaze: QOMify target specific disas setup
disas: arm: QOMify target specific disas setup
disas: arm-a64: Make printfer and stream variable
disas: QOMify target specific setup
disas: Add print_insn to disassemble info
microblaze: boot: Use cpu_set_pc()
hw/arm/boot: Use cpu_set_pc()
gdbstub: Use cpu_set_pc() helper
cpu: Add wrapper for the set_pc() hook
cpu-exec: Purge all uses of ENV_GET_CPU()
cpu: Change cpu_exec_init() arg to cpu, not env
cpu: Change tcg_cpu_exec() arg to cpu, not env
gdbstub: Change gdbserver_fork() to accept cpu instead of env
translate-all: Change tb_flush() env argument to cpu
target-ppc: Move cpu_exec_init() call to realize function
cpu: Convert cpu_index into a bitmap
cpu: Add Error argument to cpu_exec_init()
cpu: Reorder cpu->as, cpu->thread_id, cpu->memory_dispatch init
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
diff --git a/target-mips/kvm.c b/target-mips/kvm.c
index 7d2293d..bd64a70 100644
--- a/target-mips/kvm.c
+++ b/target-mips/kvm.c
@@ -212,10 +212,10 @@
}
#define MIPS_CP0_32(_R, _S) \
- (KVM_REG_MIPS | KVM_REG_SIZE_U32 | 0x10000 | (8 * (_R) + (_S)))
+ (KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U32 | (8 * (_R) + (_S)))
#define MIPS_CP0_64(_R, _S) \
- (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 0x10000 | (8 * (_R) + (_S)))
+ (KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U64 | (8 * (_R) + (_S)))
#define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0)
#define KVM_REG_MIPS_CP0_CONTEXT MIPS_CP0_64(4, 0)
@@ -232,17 +232,6 @@
#define KVM_REG_MIPS_CP0_EPC MIPS_CP0_64(14, 0)
#define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0)
-/* CP0_Count control */
-#define KVM_REG_MIPS_COUNT_CTL (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
- 0x20000 | 0)
-#define KVM_REG_MIPS_COUNT_CTL_DC 0x00000001 /* master disable */
-/* CP0_Count resume monotonic nanoseconds */
-#define KVM_REG_MIPS_COUNT_RESUME (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
- 0x20000 | 1)
-/* CP0_Count rate in Hz */
-#define KVM_REG_MIPS_COUNT_HZ (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
- 0x20000 | 2)
-
static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id,
int32_t *addr)
{
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index f643eca..6680299 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -1012,7 +1012,7 @@
static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
{
- TCGMemOpIdx oi = lb->oi;
+ TCGMemOpIdx oi = l->oi;
TCGMemOp opc = get_memop(oi);
TCGReg v0;
int i;
@@ -1055,7 +1055,7 @@
static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
{
- TCGMemOpIdx oi = lb->oi;
+ TCGMemOpIdx oi = l->oi;
TCGMemOp opc = get_memop(oi);
TCGMemOp s_bits = opc & MO_SIZE;
int i;