)]}'
{
  "commit": "14ba79c73a1c2db78becef171ec2f73606c1d7e1",
  "tree": "8d61531b379d053f9f9c462e68d0f02abe5b52e3",
  "parents": [
    "4814f2d116c057d6fdfd57f3b979c77d5668e878"
  ],
  "author": {
    "name": "Tom Musta",
    "email": "tommusta@gmail.com",
    "time": "Wed Nov 12 15:46:01 2014 -0600"
  },
  "committer": {
    "name": "Alexander Graf",
    "email": "agraf@suse.de",
    "time": "Wed Jan 07 16:16:25 2015 +0100"
  },
  "message": "target-ppc: mffs. Should Set CR1 from FPSCR Bits\n\nUpdate the Move From FPSCR (mffs.) instruction to correctly\nset CR[1] from FPSCR[FX,FEX,VX,OX].\n\nSigned-off-by: Tom Musta \u003ctommusta@gmail.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "35c3a16091eb70ebe2833cae30d9289ff0f753c4",
      "old_mode": 33188,
      "old_path": "target-ppc/translate.c",
      "new_id": "32c9f49fe07004daa5dee49f01016d109d8f6c0c",
      "new_mode": 33188,
      "new_path": "target-ppc/translate.c"
    }
  ]
}