)]}'
{
  "commit": "165d9b82eb8c877ee691a7b7bde5930bc2d07037",
  "tree": "dc956f46e452d47ab959fc43fc1b0339722b85e9",
  "parents": [
    "249aa745fb133be47d3fea1cdecec55af7589919"
  ],
  "author": {
    "name": "aliguori",
    "email": "aliguori@c046a42c-6fe2-441c-8c8c-71466251a162",
    "time": "Mon Jan 26 17:53:04 2009 +0000"
  },
  "committer": {
    "name": "aliguori",
    "email": "aliguori@c046a42c-6fe2-441c-8c8c-71466251a162",
    "time": "Mon Jan 26 17:53:04 2009 +0000"
  },
  "message": "MTRR support on x86 (Carl-Daniel Hailfinger)\n\nThe current codebase ignores MTRR (Memory Type Range Register)\nconfiguration writes and reads because Qemu does not implement caching.\nAll BIOS/firmware in know of for x86 do implement a mode called\nCache-as-RAM (CAR) which locks down the CPU cache lines and uses the CPU\ncache like RAM before RAM is enabled. Qemu assumes RAM is accessible\nfrom the start, but it would be nice to be able to run real\nBIOS/firmware in Qemu. For that, we need CAR support and for CAR support\nwe have to support MTRRs.\n\nThis patch is a first step in that direction. MTRRs are MSRs supported\nby all recent x86 CPUs, even old i586. Besides influencing cache, the\nMTRRs can be written and read back, so discarding MTRR writes violates\nthe expectations of existing code out there.\n\nAn added benefit of this patch is that it fixes the following Linux\nkernel error message present in recent kernels (provided the BIOS has\nthe recent MTRR patches applied):\n ------------[ cut here ]------------\nWARNING: at arch/x86/kernel/cpu/mtrr/main.c:1500 mtrr_trim_uncached_memory+0x382/0x384()\nWARNING: strange, CPU MTRRs all blank?\nModules linked in:\nSupported: Yes\nPid: 0, comm: swapper Not tainted 2.6.27.7-9-default #1\n [\u003cc0106570\u003e] dump_trace+0x6b/0x249\n [\u003cc01070a5\u003e] show_trace+0x20/0x39\n [\u003cc0343c02\u003e] dump_stack+0x71/0x76\n [\u003cc012acb2\u003e] warn_slowpath+0x6f/0x90\n [\u003cc0542f8f\u003e] mtrr_trim_uncached_memory+0x382/0x384\n [\u003cc053f24d\u003e] setup_arch+0x40d/0x639\n [\u003cc053a6ac\u003e] start_kernel+0x6b/0x31f\n \u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\u003d\n ---[ end trace 4eaa2a86a8e2da22 ]---\n\nHandle common x86 MTRR reads and writes, but don\u0027t act on them.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nSigned-off-by: Anthony Liguori \u003caliguori@us.ibm.com\u003e\n\n\ngit-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6449 c046a42c-6fe2-441c-8c8c-71466251a162\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "78035603bf6e8f6d0ead48e94fc97f34414d9318",
      "old_mode": 33188,
      "old_path": "target-i386/cpu.h",
      "new_id": "f1715b2e972cc7e850f2b870a212aaddc36f4d9d",
      "new_mode": 33188,
      "new_path": "target-i386/cpu.h"
    },
    {
      "type": "modify",
      "old_id": "dcbc361a0207e4888170bfbbea1e8446647e5e5d",
      "old_mode": 33188,
      "old_path": "target-i386/op_helper.c",
      "new_id": "1a615b3ba00c93efdb70e8c8977f8efeb6958f29",
      "new_mode": 33188,
      "new_path": "target-i386/op_helper.c"
    }
  ]
}