Fix erraneous fallthrough in MIPS trap implementation, thanks Atsushi Nemoto.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2247 c046a42c-6fe2-441c-8c8c-71466251a162
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 64f7d75..c9cbc9d 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1276,6 +1276,7 @@
             GEN_LOAD_REG_TN(T1, rt);
             cond = 1;
         }
+        break;
     case OPC_TEQI:
     case OPC_TGEI:
     case OPC_TGEIU: