commit 185f07621fc42c1da194ada0fe98439f07f78aa0
author ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> Thu Nov 22 15:10:21 2007 +0000
committer ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> Thu Nov 22 15:10:21 2007 +0000
tree 3c184eef12185c5eac2498eafe1c026626e34bc7
parent e7c240035fe1ffbb6efba10e8db002f92459ad00

Optimize the conventional move operation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3720 c046a42c-6fe2-441c-8c8c-71466251a162

target-mips/translate.c

diff --git a/target-mips/translate.c b/target-mips/translate.c
index b3ae2cc..55e6290 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1240,6 +1240,12 @@
         return;
     }
     GEN_LOAD_REG_TN(T0, rs);
+    /* Specialcase the conventional move operation. */
+    if (rt == 0 && (opc == OPC_ADDU || opc == OPC_DADDU
+                    || opc == OPC_SUBU || opc == OPC_DSUBU)) {
+        GEN_STORE_TN_REG(rd, T0);
+        return;
+    }
     GEN_LOAD_REG_TN(T1, rt);
     switch (opc) {
     case OPC_ADD: