tree 5665679277dac50aaa9eaedf025a1ca954ab38fc
parent ae1be0bbc127a9a6289873efdb7cb22c57d81a9d
author Michael S. Tsirkin <mst@redhat.com> 1259143210 +0200
committer Michael S. Tsirkin <mst@redhat.com> 1259683200 +0200

msix: fix reset value for enable bit

On reset, we currently clear all bits in msix control register *except*
enable bit.  This is wrong: the spec says we should clear writeable
bits: function mask and enable bit.
Correct this.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>