)]}'
{
  "commit": "2174d1e1ff3522f6f64260bad460185b7ca5bd26",
  "tree": "c939f74ddaa271e36fc60aeb296fd8c29dbd5149",
  "parents": [
    "b90cf716928d7934f4c1392f9097247a84b295d2"
  ],
  "author": {
    "name": "Aurelien Jarno",
    "email": "aurelien@aurel32.net",
    "time": "Tue Oct 09 21:53:55 2012 +0200"
  },
  "committer": {
    "name": "Aurelien Jarno",
    "email": "aurelien@aurel32.net",
    "time": "Wed Oct 17 01:26:43 2012 +0200"
  },
  "message": "tcg/ia64: remove suboptimal register shifting in qemu_ld/st ops\n\nRemove suboptimal register shifting in qemu_ld/st ops, introduced at the\nCONFIG_TCG_PASS_AREG0 time.\n\nAs mem_idx is now loaded in register R58/R59 for the slow path, we have\nto make sure to do it last, to not add additional register constraints.\n\nReviewed-by: Richard Henderson \u003crth@twiddle.net\u003e\nSigned-off-by: Aurelien Jarno \u003caurelien@aurel32.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d4d350fe36349e77a5b44765f72da34d08573ad7",
      "old_mode": 33188,
      "old_path": "tcg/ia64/tcg-target.c",
      "new_id": "16edc1b85a44faf1e8e7d3cc398a6fb145f4a261",
      "new_mode": 33188,
      "new_path": "tcg/ia64/tcg-target.c"
    }
  ]
}