)]}'
{
  "commit": "2452731c883cb0acd4e47b23039c46cd880cf2c6",
  "tree": "e5f6fc479e155d21c5803eaa1e2ca6c4d3e665cc",
  "parents": [
    "22d9e1a986a671ebfacb21555b7533336f3e8259"
  ],
  "author": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Tue Aug 20 14:54:31 2013 +0100"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Tue Aug 20 14:54:31 2013 +0100"
  },
  "message": "target-arm: Support coprocessor registers which do I/O\n\nAdd an ARM_CP_IO flag which an ARMCPRegInfo definition can use to\nindicate that the register\u0027s implementation does I/O and thus\nits accesses need to be surrounded by gen_io_start()/gen_io_end()\nin order for icount to work. Most notably, cp registers which\nimplement clocks or timers need this.\n\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\nTested-by: Laurent Desnogues \u003claurent.desnogues@gmail.com\u003e\nReviewed-by: Edgar E. Iglesias \u003cedgar.iglesias@gmail.com\u003e\nMessage-id: 1376065080-26661-3-git-send-email-peter.maydell@linaro.org\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "dffeec7455dd42393151156fc87f218c1733b461",
      "old_mode": 33188,
      "old_path": "target-arm/cpu.h",
      "new_id": "c2cb534dc7f41e59f29284a4a8f42fb31a531a4a",
      "new_mode": 33188,
      "new_path": "target-arm/cpu.h"
    },
    {
      "type": "modify",
      "old_id": "6db4c50df4f423014915b803c3e58f4d5efa011b",
      "old_mode": 33188,
      "old_path": "target-arm/translate.c",
      "new_id": "d1e8538142d0d5b7c6cea68de0baffab102351de",
      "new_mode": 33188,
      "new_path": "target-arm/translate.c"
    }
  ]
}