a15mpcore: Use qemu_get_cpu() for generic timers
This simplifies the loop and aids with refactoring of CPU list.
Requested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index af182da..9abba67 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -50,7 +50,6 @@
SysBusDevice *busdev;
const char *gictype = "arm_gic";
int i;
- CPUState *cpu;
if (kvm_irqchip_in_kernel()) {
gictype = "kvm-arm-gic";
@@ -72,8 +71,8 @@
/* Wire the outputs from each CPU's generic timer to the
* appropriate GIC PPI inputs
*/
- for (i = 0, cpu = first_cpu; i < s->num_cpu; i++, cpu = cpu->next_cpu) {
- DeviceState *cpudev = DEVICE(cpu);
+ for (i = 0; i < s->num_cpu; i++) {
+ DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
int ppibase = s->num_irq - 32 + i * 32;
/* physical timer; we wire it up to the non-secure timer's ID,
* since a real A15 always has TrustZone but QEMU doesn't.
