)]}'
{
  "commit": "2ada0ed785a923e35175c084f09a656b10d1a4fa",
  "tree": "a912c6a70731de486696431137686cdd54438b3d",
  "parents": [
    "4911012d267519d104a3123783c9b86bddc59f39"
  ],
  "author": {
    "name": "blueswir1",
    "email": "blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162",
    "time": "Sat Mar 07 20:56:21 2009 +0000"
  },
  "committer": {
    "name": "blueswir1",
    "email": "blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162",
    "time": "Sat Mar 07 20:56:21 2009 +0000"
  },
  "message": "Fix RFI(d)\n\nThe current implementation masks some MSR bits from SRR1 as it is\ngiven on rfi(d). This looks pretty wrong and breaks Altivec.\n\nSigned-off-by: Alexander Graf \u003calex@csgraf.de\u003e\n\n\ngit-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6754 c046a42c-6fe2-441c-8c8c-71466251a162\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "76fe8f6f8c3e3566db71d49a3e1c528189faf709",
      "old_mode": 33188,
      "old_path": "target-ppc/op_helper.c",
      "new_id": "f21f695db6bde0c11274dc03af3a3c32c7377e48",
      "new_mode": 33188,
      "new_path": "target-ppc/op_helper.c"
    }
  ]
}