)]}'
{
  "commit": "2c7ffc414d8591018248b5487757e45f7bb6bd3c",
  "tree": "4d4d2e4ec155fb23905b7160f023113645232aca",
  "parents": [
    "90e496386fe7fd32c189561f846b7913f95b8cf4"
  ],
  "author": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Tue Apr 15 19:18:40 2014 +0100"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Thu Apr 17 21:34:03 2014 +0100"
  },
  "message": "target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1\n\nThe current A32/T32 decoder bases its \"is VFP/Neon enabled?\" check\non the FPSCR.EN bit. This is correct if EL1 is AArch32, but for\nan AArch64 EL1 the logic is different: it must act as if FPSCR.EN\nis always set. Instead, trapping must happen according to CPACR\nbits for cp10/cp11; these cover all of FP/Neon, including the\nFPSCR/FPSID/MVFR register accesses which FPSCR.EN does not affect.\nAdd support for CPACR checks (which are also required for ARMv7,\nbut were unimplemented because Linux happens not to use them)\nand make sure they generate exceptions with the correct syndrome.\n\nWe actually return incorrect syndrome information for cases\nwhere FP is disabled but the specific instruction bit pattern\nis unallocated: strictly these should be the Uncategorized\nexception, not a \"SIMD disabled\" exception. This should be\nmostly harmless, and the structure of the A32/T32 VFP/Neon\ndecoder makes it painful to put the \u0027FP disabled?\u0027 checks in\nthe right places.\n\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\nReviewed-by: Peter Crosthwaite \u003cpeter.crosthwaite@xilinx.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "72c4c7a9b5d27a2c9abfce7f5c9d8e47d1863825",
      "old_mode": 33188,
      "old_path": "target-arm/cpu.h",
      "new_id": "ff56519e65135fc13c00d30e05e81271a438a181",
      "new_mode": 33188,
      "new_path": "target-arm/cpu.h"
    },
    {
      "type": "modify",
      "old_id": "84700ca7fd7832721fc48e847f22dd2b28bfb7ca",
      "old_mode": 33188,
      "old_path": "target-arm/translate.c",
      "new_id": "03e2c00e94a39dfa9f4b0f5ad6a78f39415e3d0e",
      "new_mode": 33188,
      "new_path": "target-arm/translate.c"
    }
  ]
}