tree 1bd8e86817271d614d69eb047a6f0fe2edff728e
parent 6f6831f61a44fde832ee6fab0cc5632de34cf6b7
parent c04018e93390e31b40044f3db92c173fb0ccb3d2
author Peter Maydell <peter.maydell@linaro.org> 1393455230 +0000
committer Peter Maydell <peter.maydell@linaro.org> 1393455231 +0000
mergetag object c04018e93390e31b40044f3db92c173fb0ccb3d2
 type commit
 tag pull-target-arm-20140226
 tagger Peter Maydell <peter.maydell@linaro.org> 1393436964 +0000
 
 target-arm queue:
  * fixes for various Coverity-spotted bugs
  * support new KVM device control API for VGIC
  * support KVM VGIC save/restore/migration
  * more AArch64 system mode foundations
  * support ARMv8 CRC instructions for A32/T32
  * PL330 minor fixes and cleanup
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140226' into staging

target-arm queue:
 * fixes for various Coverity-spotted bugs
 * support new KVM device control API for VGIC
 * support KVM VGIC save/restore/migration
 * more AArch64 system mode foundations
 * support ARMv8 CRC instructions for A32/T32
 * PL330 minor fixes and cleanup

# gpg: Signature made Wed 26 Feb 2014 17:51:32 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"

* remotes/pmaydell/tags/pull-target-arm-20140226: (45 commits)
  dma/pl330: implement dmaadnh instruction
  dma/pl330: Fix buffer depth
  dma/pl330: Add event debugging printfs
  dma/pl330: Rename parent_obj
  dma/pl330: printf format type sweep.
  dma/pl330: Fix misleading type
  dma/pl330: Delete overly verbose debug printf
  target-arm: Add support for AArch32 ARMv8 CRC32 instructions
  include/qemu/crc32c.h: Rename include guards to match filename
  target-arm: Add utility function for checking AA32/64 state of an EL
  target-arm: Implement AArch64 view of CPACR
  target-arm: A64: Implement MSR (immediate) instructions
  target-arm: Store AIF bits in env->pstate for AArch32
  target-arm: A64: Implement WFI
  target-arm: Get MMU index information correct for A64 code
  target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI
  target-arm: Implement AArch64 dummy breakpoint and watchpoint registers
  target-arm: Implement AArch64 ID and feature registers
  target-arm: Implement AArch64 generic timers
  target-arm: Implement AArch64 MPIDR
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>