)]}'
{
  "commit": "34f5606ee101f82a247d09d05644ad2a63c8e342",
  "tree": "a7416f9afd7031e08289476bdcbcbaadb8ad318e",
  "parents": [
    "80625b97b52836b944a6438e8e3e9d992e6a00b6"
  ],
  "author": {
    "name": "Petar Jovanovic",
    "email": "petarj@mips.com",
    "time": "Mon Nov 26 16:13:21 2012 +0100"
  },
  "committer": {
    "name": "Aurelien Jarno",
    "email": "aurelien@aurel32.net",
    "time": "Thu Dec 06 08:10:50 2012 +0100"
  },
  "message": "target-mips: Fix incorrect code and test for INSV\n\nContent of register rs should be shifted for pos before applying a mask.\nThis change contains both fix for the instruction and to the existing test.\n\nSigned-off-by: Petar Jovanovic \u003cpetarj@mips.com\u003e\nReviewed-by: Eric Johnson \u003cericj@mips.com\u003e\nSigned-off-by: Aurelien Jarno \u003caurelien@aurel32.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e7949c22c0b3bcc97ae756c09557e6578be18374",
      "old_mode": 33188,
      "old_path": "target-mips/dsp_helper.c",
      "new_id": "fda5f0460bd59b5d13ce6b1775e8ddd2b6ffb6fc",
      "new_mode": 33188,
      "new_path": "target-mips/dsp_helper.c"
    },
    {
      "type": "modify",
      "old_id": "7e3b0476064dc6f93e659b7c11d3be2ba15dfd2f",
      "old_mode": 33188,
      "old_path": "tests/tcg/mips/mips32-dsp/insv.c",
      "new_id": "243b00733d4f6886674c92c78ba87102c0643859",
      "new_mode": 33188,
      "new_path": "tests/tcg/mips/mips32-dsp/insv.c"
    }
  ]
}