)]}'
{
  "commit": "40e76f736d09535bc20e980a06c059229c7b5265",
  "tree": "bace666bd3a8f317041baf2a9e6279d1f9080486",
  "parents": [
    "959e41473f2179850578482052fb73b913bc4e42"
  ],
  "author": {
    "name": "Peter Crosthwaite",
    "email": "peter.crosthwaite@xilinx.com",
    "time": "Mon May 05 21:39:38 2014 -0700"
  },
  "committer": {
    "name": "Stefan Hajnoczi",
    "email": "stefanha@redhat.com",
    "time": "Mon Jun 09 15:38:58 2014 +0200"
  },
  "message": "net: xilinx_ethlite: Fix Rx-pong interrupt\n\nThere is no CTRL_I bit in the pong buffer control register. The\nCTRL_I bit from the ping buffer masks both ping and pong buffers.\nFix.\n\nSigned-off-by: Peter Crosthwaite \u003cpeter.crosthwaite@xilinx.com\u003e\nSigned-off-by: Stefan Hajnoczi \u003cstefanha@redhat.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "5a434f642d1886ff5b65f3e547043b2cc224fda3",
      "old_mode": 33188,
      "old_path": "hw/net/xilinx_ethlite.c",
      "new_id": "1b177b3dae332e8a186a6a38a8c90a6220231be9",
      "new_mode": 33188,
      "new_path": "hw/net/xilinx_ethlite.c"
    }
  ]
}