)]}'
{
  "commit": "462eda24e5f9cf41a7078a8503ff01865f83d372",
  "tree": "ba165baaf07869b860400db1b1381f3d633e9bfc",
  "parents": [
    "d60efc6b0d3d4e90cbbb86e21451e55263c29416"
  ],
  "author": {
    "name": "Blue Swirl",
    "email": "blauwirbel@gmail.com",
    "time": "Tue Aug 25 18:29:36 2009 +0000"
  },
  "committer": {
    "name": "Blue Swirl",
    "email": "blauwirbel@gmail.com",
    "time": "Tue Aug 25 18:29:36 2009 +0000"
  },
  "message": "Sparc32: improve interrupt handling\n\nLevel 15 interrupts are broadcast to all CPUs, each CPU can clear the\ninterrupt using the local Clear Pending register.\n\nUpdate intbit_to_level table.\n\nDon\u0027t try to raise level 0 interrupts.\n\nCalculate pending interrupts based on the separate inputs from master\nregister. Setting or resetting the pending level isn\u0027t correct because of\noverlap of levels.\n\nLevel 14 is always used for CPU timer interrupts, remove the property.\n\nSigned-off-by: Blue Swirl \u003cblauwirbel@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7ac1c93ad21fe1f4f124b06e98c89222ffb8a2ad",
      "old_mode": 33188,
      "old_path": "hw/slavio_intctl.c",
      "new_id": "6961cb08871afde27972f50d7fce4dc6e6dcd08c",
      "new_mode": 33188,
      "new_path": "hw/slavio_intctl.c"
    },
    {
      "type": "modify",
      "old_id": "88a0b2511d3dbe5cb6a4629f9f444ae8e885f2d8",
      "old_mode": 33188,
      "old_path": "hw/sun4m.c",
      "new_id": "17854dbbd2711471919bf73aecc51c893d444c90",
      "new_mode": 33188,
      "new_path": "hw/sun4m.c"
    }
  ]
}