)]}'
{
  "commit": "51455c59ddc370612f6e070d8eb0e594aaa7ef24",
  "tree": "a3044bd466cb3a548e6abad273663469bf68647a",
  "parents": [
    "9f9a03b9818194da39c6759d9b0cbee5d7ace4e1",
    "91b1df8cf9e1ecaa8679c9ea8713d1e25c28e6c4"
  ],
  "author": {
    "name": "Anthony Liguori",
    "email": "aliguori@us.ibm.com",
    "time": "Wed Jul 10 10:54:16 2013 -0500"
  },
  "committer": {
    "name": "Anthony Liguori",
    "email": "aliguori@us.ibm.com",
    "time": "Wed Jul 10 10:54:16 2013 -0500"
  },
  "message": "Merge remote-tracking branch \u0027afaerber/tags/qom-cpu-for-anthony\u0027 into staging\n\nQOM CPUState refactorings\n\n* Fix for OpenRISCCPU subclasses\n* Fix for gdbstub CPU selection\n* Move linux-user CPU functions into new header\n* CPUState part 10 refactoring: first_cpu, next_cpu, cpu_single_env et al.\n* Fix some targets to consistently inline TCG code generation\n* Centrally log CPU reset\n\n# gpg: Signature made Wed 10 Jul 2013 07:52:39 AM CDT using RSA key ID 3E7E013F\n# gpg: Can\u0027t check signature: public key not found\n\n# By Andreas Färber (41) and others\n# Via Andreas Färber\n* afaerber/tags/qom-cpu-for-anthony: (43 commits)\n  cpu: Move reset logging to CPUState\n  target-ppc: Change LOG_MMU_STATE() argument to CPUState\n  target-i386: Change LOG_PCALL_STATE() argument to CPUState\n  log: Change log_cpu_state[_mask]() argument to CPUState\n  target-i386: Change do_smm_enter() argument to X86CPU\n  target-i386: Change do_interrupt_all() argument to X86CPU\n  target-xtensa: Change gen_intermediate_code_internal() arg to XtensaCPU\n  target-unicore32: Change gen_intermediate_code_internal() signature\n  target-sparc: Change gen_intermediate_code_internal() argument to SPARCCPU\n  target-sh4: Change gen_intermediate_code_internal() argument to SuperHCPU\n  target-s390x: Change gen_intermediate_code_internal() argument to S390CPU\n  target-ppc: Change gen_intermediate_code_internal() argument to PowerPCCPU\n  target-mips: Change gen_intermediate_code_internal() argument to MIPSCPU\n  target-microblaze: Change gen_intermediate_code_internal() argument types\n  target-m68k: Change gen_intermediate_code_internal() argument to M68kCPU\n  target-lm32: Change gen_intermediate_code_internal() argument to LM32CPU\n  target-i386: Change gen_intermediate_code_internal() argument to X86CPU\n  target-cris: Change gen_intermediate_code_internal() argument to CRISCPU\n  target-arm: Change gen_intermediate_code_internal() argument to ARMCPU\n  target-alpha: Change gen_intermediate_code_internal() argument to AlphaCPU\n  ...\n",
  "tree_diff": []
}