)]}'
{
  "commit": "5469963394eba2df7c0a093a3792dc82e060cd65",
  "tree": "2c0dfdf11e86232d49d59b1a4bc0f06ce7c14a22",
  "parents": [
    "53878a132aaadbedbe8fe0e44afa032a4ed73aea",
    "3c30dd5a68e9fee6af67cfd0d14ed7520820f36a"
  ],
  "author": {
    "name": "Anthony Liguori",
    "email": "aliguori@us.ibm.com",
    "time": "Mon Apr 23 11:49:59 2012 -0500"
  },
  "committer": {
    "name": "Anthony Liguori",
    "email": "aliguori@us.ibm.com",
    "time": "Mon Apr 23 11:49:59 2012 -0500"
  },
  "message": "Merge remote-tracking branch \u0027origin/master\u0027 into staging\n\n* origin/master: (27 commits)\n  target-arm: Move reset handling to arm_cpu_reset\n  target-arm: Drop cpu_reset_model_id()\n  target-arm: Move cache ID register setup to cpu specific init fns\n  target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset\n  target-arm: Move feature register setup to per-CPU init fns\n  target-arm: Move iWMMXT wCID reset to cpu_state_reset\n  target-arm: Drop JTAG_ID documentation\n  target-arm: Move SCTLR reset value setup to per cpu init fns\n  target-arm: Move CTR setup to per cpu init fns\n  target-arm: Move MVFR* setup to per cpu init fns\n  target-arm: Move FPSID config to cpu init fns\n  target-arm: Move feature bit settings to CPU init fns\n  target-arm: Add QOM subclasses for each ARM cpu implementation\n  target-arm: remind to keep arm features in sync with linux-user/elfload.c\n  tci: GETPC() macro must return an uintptr_t\n  gdbstub: Synchronize CPU state unconditionally in gdb_set_cpu_pc\n  softfloat: make USE_SOFTFLOAT_STRUCT_TYPES compile\n  target-xtensa: add tests for LOOPNEZ and LOOPGTZ\n  target-xtensa: fix LOOPNEZ/LOOPGTZ translation\n  qtest: add m48t59 tests for Sparc\n  ...\n",
  "tree_diff": []
}