tree 31a96bb3ec72a229b86a7e6380cb0512507a02b2
parent 0ff93d11bc0890b2569f748266c04f4417ec3233
author Tom Musta <tommusta@gmail.com> 1418920475 -0600
committer Alexander Graf <agraf@suse.de> 1420643787 +0100

target-ppc: Introduce TM Noops

Add degenerate implementations of the non-privileged Transactional
Memory instructions tend., tabort*. and tsr.  This implementation
simply checks the MSR[TM] bit and then sets CR0 to 0b0000.  This
is a reasonable degenerate implementation since transactions are
never allowed to begin and hence MSR[TS] is always 0b00.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>