Merge branch 'target-arm.next' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'target-arm.next' of git://git.linaro.org/people/pmaydell/qemu-arm:
target-arm: Fix SWI (SVC) instruction in M profile.
target-arm: use type_register() instead of type_register_static()
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 17875ed..94536bb 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -778,7 +778,7 @@
.class_size = sizeof(ARMCPUClass),
};
- type_register_static(&type_info);
+ type_register(&type_info);
}
static const TypeInfo arm_cpu_type_info = {
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 0525aec..66ab78e 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1736,7 +1736,7 @@
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
return;
case EXCP_SWI:
- env->regs[15] += 2;
+ /* The PC already points to the next instruction. */
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SVC);
return;
case EXCP_PREFETCH_ABORT:
