tree 6962c4ed803b69a979da2b8664c303b030939ef5
parent 3ea3bd62451ac79478b440ad9fe2a4cd69783a1f
author Peter Maydell <peter.maydell@linaro.org> 1391870815 +0000
committer Peter Maydell <peter.maydell@linaro.org> 1391870815 +0000

target-arm: A64: Implement SIMD 3-reg-same shift and saturate insns

Implement the SIMD 3-reg-same instructions SQADD, UQADD,
SQSUB, UQSUB, SSHL, USHL, SQSHl, UQSHL, SRSHL, URSHL,
SQRSHL, UQRSHL; these are all simple calls to existing
Neon helpers. We also enable SSHL, USHL, SRSHL and URSHL
for the 3-reg-same-scalar category (but not the others
because they can have non-size-64 operands and the
scalar_3reg_same function doesn't support that yet.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>