)]}'
{
  "commit": "6e0c0ed185227c301f643281220603fcaf217b31",
  "tree": "44174a08d62f7f258c766b03ee9f28c6ac2e9ac1",
  "parents": [
    "934814f1984346af3e95306648cf20195269b098"
  ],
  "author": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Fri Jul 22 00:51:20 2011 +0000"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Tue Jul 26 14:30:54 2011 +0000"
  },
  "message": "target-arm: UNDEF on a VCVTT/VCVTB UNPREDICTABLE to avoid TCG assert\n\nVCVTT/VCVTB with bit 8 set is UNPREDICTABLE; we choose to UNDEF.\nThis avoids a TCG assert later when the VCVTT/VCVTB code tries to\nuse a source register that wasn\u0027t ever set up.\n\nWe pull the check for the presence of the half-precision extension\nup in to this common code as well.\n\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7acb498277c2d2da639de3f5b7f9c34a1ad16031",
      "old_mode": 33188,
      "old_path": "target-arm/translate.c",
      "new_id": "fcb41d1cbe11bfe14da2b3e42e988eabea1ed2a9",
      "new_mode": 33188,
      "new_path": "target-arm/translate.c"
    }
  ]
}