)]}'
{
  "commit": "72430bf5eb7f7309e705705af9798d13aa94e80d",
  "tree": "151e6daa6286afba37acd162469449705f26ad43",
  "parents": [
    "89e4a51ca9546a7bbe1998c4e3d4a3ac3a0c19be"
  ],
  "author": {
    "name": "Alex Bennée",
    "email": "alex.bennee@linaro.org",
    "time": "Fri Jan 31 14:47:30 2014 +0000"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Fri Jan 31 14:47:30 2014 +0000"
  },
  "message": "target-arm: A64: Add SIMD ld/st multiple\n\nThis adds support support for the SIMD load/store\nmultiple category of instructions.\n\nThis also brings in a couple of helper functions for manipulating\nsections of the SIMD registers:\n\n  * do_vec_get - fetch value from a slice of a vector register\n  * do_vec_set - set a slice of a vector register\n\nwhich use vec_reg_offset for consistent processing of offsets in an\nendian aware manner. There are also additional helpers:\n\n  * do_vec_ld - load value into SIMD\n  * do_vec_st - store value from SIMD\n\nwhich load or store a slice of a vector register to memory.\nThese don\u0027t zero extend like the fp variants.\n\nSigned-off-by: Alex Bennée \u003calex.bennee@linaro.org\u003e\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\nReviewed-by: Richard Henderson \u003crth@twiddle.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "cf80c46b90e06a632a0917df20bca2c2ae5bd798",
      "old_mode": 33188,
      "old_path": "target-arm/translate-a64.c",
      "new_id": "e4fdf00793276099103da903fda5eef83ff648d9",
      "new_mode": 33188,
      "new_path": "target-arm/translate-a64.c"
    }
  ]
}