)]}'
{
  "commit": "74594c9d813e4d14e9c16cc71824d8905bedc19d",
  "tree": "c8bf7a0dffbcc6db04bafb63c87a2fcbb090c969",
  "parents": [
    "b501b5e461fbf3f5c6cd91c8c933e6f4de627bee"
  ],
  "author": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Tue Mar 22 12:16:16 2011 +0000"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Wed Jun 22 15:02:08 2011 +0000"
  },
  "message": "target-arm: Minimal implementation of performance counters\n\nNewer Linux kernels assume the existence of the performance counter\ncp15 registers. Provide a minimal implementation of these registers.\nWe support no events. This should be compliant with the ARM ARM,\nexcept that we don\u0027t implement the cycle counter.\n\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
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      "old_mode": 33188,
      "old_path": "target-arm/cpu.h",
      "new_id": "1276e6985aa3c24775b5349ae624110b18a2c09a",
      "new_mode": 33188,
      "new_path": "target-arm/cpu.h"
    },
    {
      "type": "modify",
      "old_id": "9f14781d5d1044c9fd43ffe2d66bc1582ac18a47",
      "old_mode": 33188,
      "old_path": "target-arm/helper.c",
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      "new_mode": 33188,
      "new_path": "target-arm/helper.c"
    },
    {
      "type": "modify",
      "old_id": "a18b7dc67fead6761acd3ce37eac4f87b254e155",
      "old_mode": 33188,
      "old_path": "target-arm/machine.c",
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      "new_mode": 33188,
      "new_path": "target-arm/machine.c"
    },
    {
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      "old_mode": 33188,
      "old_path": "target-arm/translate.c",
      "new_id": "3e431e15cb9c68ae4bf394dbd852cfd0ae26e8f4",
      "new_mode": 33188,
      "new_path": "target-arm/translate.c"
    }
  ]
}
