)]}'
{
  "commit": "7540a43a1d9de71fa7a53ccd2bb24a04e2aace41",
  "tree": "50ea3690a02c798f87e8fb10cf6f2d5d8e91131c",
  "parents": [
    "71ca034a0dee69f77c8ac6ea7d21e5b6a0b0d836"
  ],
  "author": {
    "name": "Leon Alrae",
    "email": "leon.alrae@imgtec.com",
    "time": "Mon Sep 14 13:58:24 2015 +0100"
  },
  "committer": {
    "name": "Leon Alrae",
    "email": "leon.alrae@imgtec.com",
    "time": "Thu Oct 29 16:16:44 2015 +0000"
  },
  "message": "target-mips: implement the CPU wake-up on non-enabled interrupts in R6\n\nIn Release 6, the behaviour of WAIT has been modified to make it a\nrequirement that a processor that has disabled operation as a result of\nexecuting a WAIT will resume operation on arrival of an interrupt even if\ninterrupts are not enabled.\n\nSigned-off-by: Leon Alrae \u003cleon.alrae@imgtec.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "bbfee4509fdcdc37ac366d4f66dedd159e9d7aa5",
      "old_mode": 33188,
      "old_path": "target-mips/cpu.c",
      "new_id": "639a24b3623a9224f56467c855e144c09b76fcdc",
      "new_mode": 33188,
      "new_path": "target-mips/cpu.c"
    }
  ]
}