commit | 7dfba6dfbf805cf99c4ae89f6194bc9205dfbefe | [log] [tgz] |
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author | Guenter Roeck <linux@roeck-us.net> | Fri Apr 25 08:39:48 2014 -0700 |
committer | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | Tue May 13 09:12:40 2014 +1000 |
tree | 5bbfcd2f02f1a0b819a0b91a812f2ac45989ebb8 | |
parent | 12f7fb60863f5aae44fa7a6c1f52cbecd29d4e9c [diff] |
xilinx_timer: Fix writes into TCSR register The TCSR register has only 11 valid bits. This is now used by the linux kernel to auto-detect endianness, and causes Linux 3.15-rc1 and later to hang when run under qemu-microblaze. Mask valid bits before writing the register to solve the problem. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>