)]}'
{
  "commit": "87462e0f41fccc353f9c902caed563ab7cbdd8ed",
  "tree": "aad41097ea2f30dcf7cfbb19dab823dc0443373a",
  "parents": [
    "ad7ee8a290d08a2fe9d408af2461d1f583d96f7d"
  ],
  "author": {
    "name": "Claudio Fontana",
    "email": "claudio.fontana@linaro.org",
    "time": "Tue Dec 17 19:42:32 2013 +0000"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Tue Dec 17 19:42:32 2013 +0000"
  },
  "message": "target-arm: A64: expand decoding skeleton for system instructions\n\nDecode the various kinds of system instructions:\n hints (HINT), which include NOP, YIELD, WFE, WFI, SEV, SEL\n sync instructions, which include CLREX, DSB, DMB, ISB\n msr_i, which move immediate to processor state field\n sys, which include all SYS and SYSL instructions\n msr, which move from a gp register to a system register\n mrs, which move from a system register to a gp register\n\nProvide implementations where they are trivial nops.\n\nSigned-off-by: Claudio Fontana \u003cclaudio.fontana@linaro.org\u003e\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\nReviewed-by: Richard Henderson \u003crth@twiddle.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8e16cb1a1cfb48b6f6fd78d6e63348f4ef0359ca",
      "old_mode": 33188,
      "old_path": "target-arm/translate-a64.c",
      "new_id": "1e2b371d4b0a658d0570e064d0f05bb87b738f35",
      "new_mode": 33188,
      "new_path": "target-arm/translate-a64.c"
    }
  ]
}