| commit | 906879a98fa31232f494fece3c5cb3c2baaf8c3c | [log] [tgz] |
|---|---|---|
| author | Peter Maydell <peter.maydell@linaro.org> | Wed Jul 20 10:32:55 2011 +0000 |
| committer | Peter Maydell <peter.maydell@linaro.org> | Tue Jul 26 14:30:54 2011 +0000 |
| tree | 40d311303266cc8e8004b69c6f81d2766bab59bb | |
| parent | 7807eed932dbb88fa320ddba99bff45ba96319c6 [diff] |
target-arm: Mark 1136r1 as a v6K core The 1136r1 is actually a v6K core (unlike the 1136r0); mark it as such, thus enabling the TLS registers, NOP hints, CLREX, half and byte wide exclusive load/stores, etc. The VA-to-PA translation registers are not present on 1136r1, so introduce a new feature flag for them, which is enabled on 1176, 11MPCore and all v7 cores. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Jamie Iles <jamie@jamieiles.com>