tree 6729dcddd39ca577f06c0fd61b50ced3437964e0
parent f9fc619a0deaf2b61fe6f48034c94ca7e38801bb
author Peter Maydell <peter.maydell@linaro.org> 1342090749 +0000
committer Peter Maydell <peter.maydell@linaro.org> 1342090794 +0000

target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAE

Under LPAE, the cp15 registers PAR, TTBR0 and TTBR1 are extended
to 64 bits, with a 64 bit (MRRC/MCRR) access path to read the
full width of the register. Add the state fields for the top
half and the 64 bit access path. Actual use of the top half of
the register will come with the addition of the long-descriptor
translation table format support.

For the PAR we also need to correct the masking applied for
32 bit writes (there are no bits reserved if LPAE is implemented)
and clear the high half when doing a 32 bit result VA-to-PA
lookup.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>