)]}'
{
  "commit": "9151da25a71a171d19beec107a8ee2066cb65e7c",
  "tree": "dba3022e3040fad5b4c80e260fab3c026c008ad0",
  "parents": [
    "2133a5f6b8f8941a6a3734c6c1990656553de76c"
  ],
  "author": {
    "name": "Peter Crosthwaite",
    "email": "peter.crosthwaite@xilinx.com",
    "time": "Mon Jun 03 17:17:43 2013 +0100"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Mon Jun 03 17:17:43 2013 +0100"
  },
  "message": "xilinx_spips: Fix striping behaviour\n\nThe QSPI controller was using byte-wide stripes when striping across\nthe two flashes in dual parallel mode. The real hardware however uses\nindividual bit striping. QEMU misbehaves in the (corner) case where\ndata is written/read in dual-parallel mode and read/written back in\nsingle mode.\n\nSigned-off-by: Peter Crosthwaite \u003cpeter.crosthwaite@xilinx.com\u003e\nReviewed-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\nReviewed-by: Edgar E. Iglesias \u003cedgar.iglesias@gmail.com\u003e\nMessage-id: 718a61df1bf746ec06f6da44d12f8317af7b08ce.1369117359.git.peter.crosthwaite@xilinx.com\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "3e9e76c165d885bf8434495fba945ce395e883e3",
      "old_mode": 33188,
      "old_path": "hw/ssi/xilinx_spips.c",
      "new_id": "7222e152e639d29cf9e03c864f9f832482424277",
      "new_mode": 33188,
      "new_path": "hw/ssi/xilinx_spips.c"
    }
  ]
}