tree dba3022e3040fad5b4c80e260fab3c026c008ad0
parent 2133a5f6b8f8941a6a3734c6c1990656553de76c
author Peter Crosthwaite <peter.crosthwaite@xilinx.com> 1370276263 +0100
committer Peter Maydell <peter.maydell@linaro.org> 1370276263 +0100

xilinx_spips: Fix striping behaviour

The QSPI controller was using byte-wide stripes when striping across
the two flashes in dual parallel mode. The real hardware however uses
individual bit striping. QEMU misbehaves in the (corner) case where
data is written/read in dual-parallel mode and read/written back in
single mode.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 718a61df1bf746ec06f6da44d12f8317af7b08ce.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>