commit | d54a299b83a07642c85a22bfe19b69ca4def9ec4 | [log] [tgz] |
---|---|---|
author | Leon Alrae <leon.alrae@imgtec.com> | Wed Sep 09 12:44:25 2015 +0100 |
committer | Leon Alrae <leon.alrae@imgtec.com> | Fri Sep 18 09:20:48 2015 +0100 |
tree | e81c778717e27d4ee9525482136669666f7daa70 | |
parent | db77d8523909b32d798cd2c80de422b68f9e5c42 [diff] |
target-mips: correct MTC0 instruction on MIPS64 MTC0 on a 64-bit processor should move entire 64-bit GPR content to CP0 register. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>