tree 71fe4a9c627ea3e375b1c428a527b9bf61ee2ea6
parent a1b1d277cdaac98f25be249e7819aac781a35530
author Christoffer Dall <christoffer.dall@linaro.org> 1384831593 -0800
committer Peter Maydell <peter.maydell@linaro.org> 1391871048 +0000

arm_gic: Add GICC_APRn state to the GICState

The GICC_APRn registers are not currently supported by the ARM GIC v2.0
emulation.  This patch adds the missing state.

Note that we also change the number of APRs to use a define GIC_NR_APRS
based on the maximum number of preemption levels.  This patch also adds
RAZ/WI accessors for the four registers on the emulated CPU interface.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>