)]}'
{
  "commit": "afcb7375123fcb73649dba56f5393e2f2e173b5e",
  "tree": "5d780c0cc56865d7dedebea0c8d49ed5b47c2785",
  "parents": [
    "a3ce3668ccff7d350a4f795ad99a012a6d41caef"
  ],
  "author": {
    "name": "Tsuneo Saito",
    "email": "tsnsaito@gmail.com",
    "time": "Mon Jul 18 15:00:00 2011 +0900"
  },
  "committer": {
    "name": "Blue Swirl",
    "email": "blauwirbel@gmail.com",
    "time": "Wed Jul 20 20:44:23 2011 +0000"
  },
  "message": "SPARC64: fix VIS1 SIMD signed compare instructions\n\nThe destination registers of SIMD signed compare instructions\n(fcmp*\u003c16|32\u003e) are not FP registers but general purpose r registers.\nComparisons should be freg_rs1 CMP freg_rs2, that were reversed.\n\nSigned-off-by: Tsuneo Saito \u003ctsnsaito@gmail.com\u003e\nSigned-off-by: Blue Swirl \u003cblauwirbel@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "023f4d6023e1ac63545b28eb12e444ab73136571",
      "old_mode": 33188,
      "old_path": "target-sparc/helper.h",
      "new_id": "2d36af3a31349d3e60fd65a8686cb552ce11cbb9",
      "new_mode": 33188,
      "new_path": "target-sparc/helper.h"
    },
    {
      "type": "modify",
      "old_id": "15af27ba1f8549744f674f46e3bc891e62d83c24",
      "old_mode": 33188,
      "old_path": "target-sparc/op_helper.c",
      "new_id": "b99223eddb425e1d79acd0c33eb12734a069f297",
      "new_mode": 33188,
      "new_path": "target-sparc/op_helper.c"
    },
    {
      "type": "modify",
      "old_id": "27c2cf98e8c22472ceef69155629ec640ffef58e",
      "old_mode": 33188,
      "old_path": "target-sparc/translate.c",
      "new_id": "a1a19c34e62d29e4f5ca901a434cb4afb5a2c12b",
      "new_mode": 33188,
      "new_path": "target-sparc/translate.c"
    }
  ]
}