)]}'
{
  "commit": "b141290478f847ecaa25561f3b31fbf1ddde95e6",
  "tree": "5a4a648e7bee0d53bf6c4d588ff013411d479804",
  "parents": [
    "7c3843332db39c2f27405b882a505144d62b3664",
    "25f2895e0e437a3548f9794846001fb5d5ab853d"
  ],
  "author": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Thu Dec 11 16:47:23 2014 +0000"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Thu Dec 11 16:47:23 2014 +0000"
  },
  "message": "Merge remote-tracking branch \u0027remotes/pmaydell/tags/pull-target-arm-20141211\u0027 into staging\n\ntarget-arm queue:\n * pass semihosting exit code out to system\n * more TrustZone support code (still not enabled yet)\n * allow user to direct semihosting to gdb or native explicitly\n   rather than always auto-guessing the destination\n * fix memory leak in realview_init\n * fix coverity warning in hw/arm/boot\n * get state migration working for AArch64 CPUs\n * check errors in kvm_arm_reset_vcpu\n\n# gpg: Signature made Thu 11 Dec 2014 12:16:19 GMT using RSA key ID 14360CDE\n# gpg: Good signature from \"Peter Maydell \u003cpeter.maydell@linaro.org\u003e\"\n\n* remotes/pmaydell/tags/pull-target-arm-20141211: (33 commits)\n  target-arm: Check error conditions on kvm_arm_reset_vcpu\n  target-arm: Support save/load for 64 bit CPUs\n  target-arm/kvm: make reg sync code common between kvm32/64\n  arm_gic_kvm: Tell kernel about number of IRQs\n  hw/arm/boot: fix uninitialized scalar variable warning reported by coverity\n  hw/arm/realview.c: Fix memory leak in realview_init()\n  target-arm: make MAIR0/1 banked\n  target-arm: make c13 cp regs banked (FCSEIDR, ...)\n  target-arm: make VBAR banked\n  target-arm: make PAR banked\n  target-arm: make IFAR/DFAR banked\n  target-arm: make DFSR banked\n  target-arm: make IFSR banked\n  target-arm: make DACR banked\n  target-arm: make TTBCR banked\n  target-arm: make TTBR0/1 banked\n  target-arm: make CSSELR banked\n  target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFI\n  target-arm: add SCTLR_EL3 and make SCTLR banked\n  target-arm: add MVBAR support\n  ...\n\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\n",
  "tree_diff": []
}