)]}'
{
  "commit": "b4d3978c2fdf944e428a46d2850dbd950b6fbe78",
  "tree": "cad66422e4c81b720274cec302bcc5eda6c471af",
  "parents": [
    "49a661910c1374858602a3002b67115893673c25"
  ],
  "author": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Thu Aug 13 11:26:22 2015 +0100"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Thu Aug 13 11:26:22 2015 +0100"
  },
  "message": "target-arm: Add the AArch64 view of the Secure physical timer\n\nOn CPUs with EL3, there are two physical timers, one for Secure and one\nfor Non-secure. Implement this extra timer and the AArch64 registers\nwhich access it.\n\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\nReviewed-by: Edgar E. Iglesias \u003cedgar.iglesias@xilinx.com\u003e\nMessage-id: 1437047249-2357-2-git-send-email-peter.maydell@linaro.org\n",
  "tree_diff": [
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}