commit c3affe5670e5d0df8a7e06f1d6e80853633146df
author Andreas Färber <afaerber@suse.de> Fri Jan 18 15:03:43 2013 +0100
committer Andreas Färber <afaerber@suse.de> Tue Mar 12 10:35:55 2013 +0100
tree bc2a6d0877cf7aea8821053cf6c8df10f167caa5
parent d8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5

cpu: Pass CPUState to cpu_interrupt()

Move it to qom/cpu.h to avoid issues with include order.

Change pc_acpi_smi_interrupt() opaque to X86CPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>

target-i386/helper.c

diff --git a/target-i386/helper.c b/target-i386/helper.c
index b49a0fc..9449a0c 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -389,7 +389,7 @@
 #endif
         /* if the cpu is currently executing code, we must unlink it and
            all the potentially executing TB */
-        cpu_interrupt(env, CPU_INTERRUPT_EXITTB);
+        cpu_interrupt(CPU(cpu), CPU_INTERRUPT_EXITTB);
 
         /* when a20 is changed, all the MMU mappings are invalid, so
            we must flush everything */
@@ -1169,7 +1169,7 @@
         banks[3] = params->misc;
         cenv->mcg_status = params->mcg_status;
         banks[1] = params->status;
-        cpu_interrupt(cenv, CPU_INTERRUPT_MCE);
+        cpu_interrupt(cpu, CPU_INTERRUPT_MCE);
     } else if (!(banks[1] & MCI_STATUS_VAL)
                || !(banks[1] & MCI_STATUS_UC)) {
         if (banks[1] & MCI_STATUS_VAL) {
@@ -1241,7 +1241,7 @@
     if (kvm_enabled()) {
         env->tpr_access_type = access;
 
-        cpu_interrupt(env, CPU_INTERRUPT_TPR);
+        cpu_interrupt(CPU(x86_env_get_cpu(env)), CPU_INTERRUPT_TPR);
     } else {
         cpu_restore_state(env, env->mem_io_pc);