commit c407df8156d7831f07f7a35c4f4da46e16fa8a0f
author aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> Thu Apr 16 11:51:03 2009 +0000
committer aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> Thu Apr 16 11:51:03 2009 +0000
tree 5f1ce9d7e4faabcee67aab54e83628a41edbc8c4
parent 8e0f950d89b1e708e07481005515ef26e9a7b4da

target-mips: optimize gen_flt_ldst()

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7125 c046a42c-6fe2-441c-8c8c-71466251a162

target-mips/translate.c

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 6d9c23c..19c5181 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1180,12 +1180,10 @@
     case OPC_LWC1:
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
-            TCGv t1 = tcg_temp_new();
 
-            tcg_gen_qemu_ld32s(t1, t0, ctx->mem_idx);
-            tcg_gen_trunc_tl_i32(fp0, t1);
+            tcg_gen_qemu_ld32s(t0, t0, ctx->mem_idx);
+            tcg_gen_trunc_tl_i32(fp0, t0);
             gen_store_fpr32(fp0, ft);
-            tcg_temp_free(t1);
             tcg_temp_free_i32(fp0);
         }
         opn = "lwc1";