)]}'
{
  "commit": "cecd8504b80148b66cdc1ce32046429bc3549090",
  "tree": "7f466152770e05d0b3fbc099b286206158eef4b6",
  "parents": [
    "b12c390b9108d44cb0b05900d6c11a73ee0e9cae"
  ],
  "author": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Thu Jan 06 19:37:55 2011 +0000"
  },
  "committer": {
    "name": "Aurelien Jarno",
    "email": "aurelien@aurel32.net",
    "time": "Thu Jan 06 22:16:59 2011 +0100"
  },
  "message": "target-arm: wire up the softfloat flush_input_to_zero flag\n\nWire up the new softfloat support for flushing input denormals\nto zero on ARM. The FPSCR FZ bit enables flush-to-zero for\nboth inputs and outputs, but the reporting of when inputs are\nflushed to zero is via a separate IDC bit rather than the UFC\n(underflow) bit used when output denormals are flushed to zero.\n\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\nAcked-by: Aurelien Jarno \u003caurelien@aurel32.net\u003e\nSigned-off-by: Aurelien Jarno \u003caurelien@aurel32.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "05684a2f4567f150f955dfbeda6bf10b972fd14a",
      "old_mode": 33188,
      "old_path": "target-arm/helper.c",
      "new_id": "705b99f9cbaab6d341fb6a363d9d4fc9b9a8cb2b",
      "new_mode": 33188,
      "new_path": "target-arm/helper.c"
    }
  ]
}
