)]}'
{
  "commit": "d1a721ab816d1b954c0988aafdec4e109b953a9f",
  "tree": "dcb64980cc93a87f9b3319f1321f79b7302b9b5f",
  "parents": [
    "a242881405811ec6e6134452311f1cd1896c8ada"
  ],
  "author": {
    "name": "Alexey Kardashevskiy",
    "email": "aik@ozlabs.ru",
    "time": "Wed Jun 04 22:50:55 2014 +1000"
  },
  "committer": {
    "name": "Alexander Graf",
    "email": "agraf@suse.de",
    "time": "Mon Jun 16 13:24:44 2014 +0200"
  },
  "message": "target-ppc: Add POWER8\u0027s TIR SPR\n\nThis adds TIR (Thread Identification Register) SPR first defined for server\nCPUs in PowerISA 2.07.\n\nSigned-off-by: Alexey Kardashevskiy \u003caik@ozlabs.ru\u003e\nReviewed-by: Tom Musta \u003ctommusta@gmail.com\u003e\nSigned-off-by: Alexander Graf \u003cagraf@suse.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6a53d70af5580a180403361467ac2866a5f91750",
      "old_mode": 33188,
      "old_path": "target-ppc/cpu.h",
      "new_id": "9f9ffb174d3a5632071cc531eafaaee66c33a32c",
      "new_mode": 33188,
      "new_path": "target-ppc/cpu.h"
    },
    {
      "type": "modify",
      "old_id": "7eb02acaba314cbd9f3764385db04d072773febf",
      "old_mode": 33188,
      "old_path": "target-ppc/translate_init.c",
      "new_id": "1df69e0cfd085e23a2246a2d7e228b4cdfd78e66",
      "new_mode": 33188,
      "new_path": "target-ppc/translate_init.c"
    }
  ]
}