)]}'
{
  "commit": "d1afc48b7cfdb4490f322d5d82a2aae6d545ec06",
  "tree": "02865832c18da733cf4f094f700bf81b66547ae2",
  "parents": [
    "b7785d2072164fa8576767853af9ed517508ee57"
  ],
  "author": {
    "name": "Tsuneo Saito",
    "email": "tsnsaito@gmail.com",
    "time": "Fri Jul 22 00:16:33 2011 +0900"
  },
  "committer": {
    "name": "Blue Swirl",
    "email": "blauwirbel@gmail.com",
    "time": "Thu Jul 21 20:02:22 2011 +0000"
  },
  "message": "SPARC64: implement addtional MMU faults related to nonfaulting load\n\nThis patch implements MMU faults caused by TTE.NFO and TTE.E:\n- access other than nonfaulting load to a page marked NFO should\n  raise data_access_exception\n- nonfaulting load to a page marked with E bit should raise\n  data_access_exception\n\nTo distinguish nonfaulting loads, this patch extends (abuses?) the rw\nargument of get_physical_address_data().  rw is set to 4 on nonfaulting\nloads.\n\nSigned-off-by: Tsuneo Saito \u003ctsnsaito@gmail.com\u003e\nSigned-off-by: Blue Swirl \u003cblauwirbel@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f4eeff5b176f716dd5a505edac5e2d466ea2d97d",
      "old_mode": 33188,
      "old_path": "target-sparc/cpu.h",
      "new_id": "a51863cf07e24a35ce7cdbd34cba9fbb465eaf24",
      "new_mode": 33188,
      "new_path": "target-sparc/cpu.h"
    },
    {
      "type": "modify",
      "old_id": "b6e62a78c29096e84bf346749ced7c243733c251",
      "old_mode": 33188,
      "old_path": "target-sparc/helper.c",
      "new_id": "acc07f5cba6ea06681d49985b9f85f17eb8e01cb",
      "new_mode": 33188,
      "new_path": "target-sparc/helper.c"
    }
  ]
}