)]}'
{
  "commit": "d5523a13656fb8df902a15a9fd8bd652b85e97e0",
  "tree": "14ea1a5159c468af35c3a85afae1b9cbbd9615d1",
  "parents": [
    "72889c8a809f4c65796b98d5af6a18c92510ed86"
  ],
  "author": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Tue Sep 08 17:38:43 2015 +0100"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Tue Sep 08 17:38:43 2015 +0100"
  },
  "message": "hw/intc/arm_gic: Actually set the active bits for active interrupts\n\nAlthough we were correctly handling interrupts becoming active\nand then inactive, we weren\u0027t actually exposing this to the guest\nby setting the \u0027active\u0027 flag for the interrupt, so reads\nof GICD_ICACTIVERn and GICD_ISACTIVERn would generally incorrectly\nreturn zeroes. Correct this oversight.\n\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\nMessage-id: 1438089748-5528-6-git-send-email-peter.maydell@linaro.org\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "9daa8cd44f31919547909b93d1a2b95877db3ada",
      "old_mode": 33188,
      "old_path": "hw/intc/arm_gic.c",
      "new_id": "2df550c01b4cda5e0f174a00f9fb27c4d9665f60",
      "new_mode": 33188,
      "new_path": "hw/intc/arm_gic.c"
    }
  ]
}