)]}'
{
  "commit": "ddaaefb4dd427d6d2e41c1cfbe0cd8d8e8d6aad9",
  "tree": "c683b40e186673f3828076a50018661f997bce5b",
  "parents": [
    "dcc209314afdaeec42f1e2a7bbf37eec3ace23de"
  ],
  "author": {
    "name": "Gerd Hoffmann",
    "email": "kraxel@redhat.com",
    "time": "Sat Dec 21 03:02:50 2013 +0100"
  },
  "committer": {
    "name": "Michael S. Tsirkin",
    "email": "mst@redhat.com",
    "time": "Mon Dec 23 18:02:23 2013 +0200"
  },
  "message": "piix: fix 32bit pci hole\n\nMake the 32bit pci hole start at end of ram, so all possible address\nspace is covered.\n\nWe used to try and make addresses aligned so they are easier to cover\nwith MTRRs, but since they are cosmetic on KVM, this is probably not\nworth worrying about.\nOf course the firmware can use less than that.  Leaving space unused is\nno problem, mapping pci bars outside the hole causes problems though.\n\nSigned-off-by: Gerd Hoffmann \u003ckraxel@redhat.com\u003e\nSigned-off-by: Laszlo Ersek \u003clersek@redhat.com\u003e\nReviewed-by: Michael S. Tsirkin \u003cmst@redhat.com\u003e\nSigned-off-by: Michael S. Tsirkin \u003cmst@redhat.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "832e20c22681a5abd71ebaee478631cf47c67ece",
      "old_mode": 33188,
      "old_path": "hw/i386/pc_piix.c",
      "new_id": "276641436ebaf897851e537484744b50fe4741d8",
      "new_mode": 33188,
      "new_path": "hw/i386/pc_piix.c"
    },
    {
      "type": "modify",
      "old_id": "63be7f6cee42000f5a397410c1ec4b42d1500faa",
      "old_mode": 33188,
      "old_path": "hw/pci-host/piix.c",
      "new_id": "4229d09acf0712c75fc2ec33e712d0dd1a64f949",
      "new_mode": 33188,
      "new_path": "hw/pci-host/piix.c"
    },
    {
      "type": "modify",
      "old_id": "24eb3de31005b8e401878ed3611d5b247a660b0c",
      "old_mode": 33188,
      "old_path": "include/hw/i386/pc.h",
      "new_id": "eb3da964f016c0525784760976db5967b9c7526e",
      "new_mode": 33188,
      "new_path": "include/hw/i386/pc.h"
    }
  ]
}
