commit | 2801339f2fb2534ccf01561d274398328bdd446d | [log] [tgz] |
---|---|---|
author | Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> | Fri May 29 11:52:35 2015 +0530 |
committer | Michael Tokarev <mjt@tls.msk.ru> | Wed Jun 03 16:03:03 2015 +0300 |
tree | 96962ba0a29c40330dd3687e4913524d835bb71e | |
parent | 8b8f1c7e9ddb2e88a144638f6527bf70e32343e3 [diff] |
cadence_gem: Fix Rx buffer size field mask This patch corrects the Rx buffer size field mask to mask bits 23 to 16 to match Xilinx UG585 documentation. Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>