)]}'
{
  "commit": "eec8972a5bc744eda695a86a984d746c240dff90",
  "tree": "b1d626358872a9c91cbacf2202635d778e55dbb6",
  "parents": [
    "a795ef8dcb8cbadffc996c41ff38927a97645234"
  ],
  "author": {
    "name": "Petar Jovanovic",
    "email": "petarj@mips.com",
    "time": "Thu Dec 06 20:30:35 2012 +0100"
  },
  "committer": {
    "name": "Aurelien Jarno",
    "email": "aurelien@aurel32.net",
    "time": "Tue Jan 01 11:10:47 2013 +0100"
  },
  "message": "target-mips: Fix incorrect reads and writes to DSPControl register\n\nUpper 4 bits of ccond (bits 31..28 ) of DSPControl register are not used in\nthe MIPS32 architecture. They are used in the MIPS64 architecture. For MIPS32\nthese bits must be written as zero, and return zero on read.\n\nThe change fixes writes (WRDSP) and reads (RDDSP) to the register. It also fixes\nthe tests that use these instructions, and makes them smaller and simpler.\n\nSigned-off-by: Petar Jovanovic \u003cpetarj@mips.com\u003e\nSigned-off-by: Aurelien Jarno \u003caurelien@aurel32.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "14daf91950b503985b40bae8884ae75a9ae99b65",
      "old_mode": 33188,
      "old_path": "target-mips/dsp_helper.c",
      "new_id": "acf7ceb1d1f99b12873746c06888db6316d609ec",
      "new_mode": 33188,
      "new_path": "target-mips/dsp_helper.c"
    },
    {
      "type": "modify",
      "old_id": "e8948ec1d9dbb18d1da57464276a01ca4143e6db",
      "old_mode": 33188,
      "old_path": "tests/tcg/mips/mips32-dsp/rddsp.c",
      "new_id": "2f30285033242aacbb43afc71a7575b2cfaaaa97",
      "new_mode": 33188,
      "new_path": "tests/tcg/mips/mips32-dsp/rddsp.c"
    },
    {
      "type": "modify",
      "old_id": "e8948ec1d9dbb18d1da57464276a01ca4143e6db",
      "old_mode": 33188,
      "old_path": "tests/tcg/mips/mips32-dsp/wrdsp.c",
      "new_id": "dc54943a99e81b686f06b17100777a9ffea9ad4b",
      "new_mode": 33188,
      "new_path": "tests/tcg/mips/mips32-dsp/wrdsp.c"
    }
  ]
}