tree b1d626358872a9c91cbacf2202635d778e55dbb6
parent a795ef8dcb8cbadffc996c41ff38927a97645234
author Petar Jovanovic <petarj@mips.com> 1354822235 +0100
committer Aurelien Jarno <aurelien@aurel32.net> 1357035047 +0100

target-mips: Fix incorrect reads and writes to DSPControl register

Upper 4 bits of ccond (bits 31..28 ) of DSPControl register are not used in
the MIPS32 architecture. They are used in the MIPS64 architecture. For MIPS32
these bits must be written as zero, and return zero on read.

The change fixes writes (WRDSP) and reads (RDDSP) to the register. It also fixes
the tests that use these instructions, and makes them smaller and simpler.

Signed-off-by: Petar Jovanovic <petarj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>