commit ef7ec1c16d184c6b7296d681aaa7e4f37cb57c6c
author aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> Tue Mar 03 06:12:03 2009 +0000
committer aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> Tue Mar 03 06:12:03 2009 +0000
tree 9f70aef16c0acde2e6e226a2b3019ef431388aac
parent 8dd640e49daeba4a47c1f9e75e0f09aeb5578644

clean build: Fix remaining sh4 warnings

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6668 c046a42c-6fe2-441c-8c8c-71466251a162

hw/shix.c

diff --git a/hw/shix.c b/hw/shix.c
index ee4f03f..0ba02f8 100644
--- a/hw/shix.c
+++ b/hw/shix.c
@@ -45,21 +45,6 @@
     /* XXXXX */
 }
 
-void vga_update_display(void)
-{
-    /* XXXXX */
-}
-
-void vga_invalidate_display(void)
-{
-    /* XXXXX */
-}
-
-void vga_screen_dump(const char *filename)
-{
-    /* XXXXX */
-}
-
 static void shix_init(ram_addr_t ram_size, int vga_ram_size,
                const char *boot_device,
 	       const char *kernel_filename, const char *kernel_cmdline,

target-sh4/cpu.h

diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 7ee22d8..c0215f8 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -165,6 +165,8 @@
   env->gbr = newtls;
 }
 
+void cpu_load_tlb(CPUSH4State * env);
+
 #include "softfloat.h"
 
 #define CPUState CPUSH4State

target-sh4/exec.h

diff --git a/target-sh4/exec.h b/target-sh4/exec.h
index e74dc9d..ad26990 100644
--- a/target-sh4/exec.h
+++ b/target-sh4/exec.h
@@ -53,10 +53,4 @@
     /* XXXXX */
 }
 
-void cpu_load_tlb(CPUState * env);
-
-int find_itlb_entry(CPUState * env, target_ulong address,
-		    int use_asid, int update);
-int find_utlb_entry(CPUState * env, target_ulong address, int use_asid);
-
 #endif				/* _EXEC_SH4_H */

target-sh4/helper.c

diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index 7f5430a..f1c170e 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -313,8 +313,8 @@
    Return entry, MMU_ITLB_MISS, MMU_ITLB_MULTIPLE or MMU_DTLB_MULTIPLE
    Update the itlb from utlb if update is not 0
 */
-int find_itlb_entry(CPUState * env, target_ulong address,
-		    int use_asid, int update)
+static int find_itlb_entry(CPUState * env, target_ulong address,
+                           int use_asid, int update)
 {
     int e, n;
 
@@ -344,7 +344,7 @@
 
 /* Find utlb entry
    Return entry, MMU_DTLB_MISS, MMU_DTLB_MULTIPLE */
-int find_utlb_entry(CPUState * env, target_ulong address, int use_asid)
+static int find_utlb_entry(CPUState * env, target_ulong address, int use_asid)
 {
     /* per utlb access */
     increment_urc(env);
@@ -418,9 +418,9 @@
     return n;
 }
 
-int get_physical_address(CPUState * env, target_ulong * physical,
-			 int *prot, target_ulong address,
-			 int rw, int access_type)
+static int get_physical_address(CPUState * env, target_ulong * physical,
+                                int *prot, target_ulong address,
+                                int rw, int access_type)
 {
     /* P1, P2 and P4 areas do not use translation */
     if ((address >= 0x80000000 && address < 0xc0000000) ||
@@ -525,7 +525,7 @@
     return physical;
 }
 
-void cpu_load_tlb(CPUState * env)
+void cpu_load_tlb(CPUSH4State * env)
 {
     int n = cpu_mmucr_urc(env->mmucr);
     tlb_t * entry = &env->utlb[n];