)]}'
{
  "commit": "f01a361bfcce4bd0c439b0e051ef2a1e56727a44",
  "tree": "ea3b3a551636e892f6b837887a449aa994d1ea53",
  "parents": [
    "26e7e982b267e71d40cd20e9e234fedef6770a90"
  ],
  "author": {
    "name": "Andrew Bennett",
    "email": "andrew.bennett@imgtec.com",
    "time": "Mon Jun 29 10:20:07 2015 +0000"
  },
  "committer": {
    "name": "Leon Alrae",
    "email": "leon.alrae@imgtec.com",
    "time": "Wed Jul 15 14:07:25 2015 +0100"
  },
  "message": "linux-user: Fix MIPS N64 trap and break instruction bug\n\nFor the MIPS N64 ABI when QEMU reads the break/trap instruction so that\nit can inspect the break/trap code it reads 8 rather than 4 bytes\nwhich means it finds the code field from the instruction after the\nbreak/trap instruction.  This then causes the break/trap handling\ncode to fail because it does not understand the code number.\n\nThe fix forces QEMU to always read 4 bytes of instruction data rather\nthan deciding how much to read based on the ABI.\n\nSigned-off-by: Andrew Bennett \u003candrew.bennett@imgtec.com\u003e\nReviewed-by: Leon Alrae \u003cleon.alrae@imgtec.com\u003e\nSigned-off-by: Leon Alrae \u003cleon.alrae@imgtec.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "05914b11e48481e09f799d5b700b7081fafb3687",
      "old_mode": 33188,
      "old_path": "linux-user/main.c",
      "new_id": "fdee9813519758e47abf0753c45930f731b8e080",
      "new_mode": 33188,
      "new_path": "linux-user/main.c"
    }
  ]
}