target-ppc: Disentangle hash mmu versions of cpu_get_phys_page_debug() cpu_get_phys_page_debug() is a trivial wrapper around get_physical_address(). But even the signature of get_physical_address() has some things we'd like to clean up on a per-mmu basis, so this patch moves the test on mmu model out to cpu_get_phys_page_debug(), moving the version for 64-bit hash MMUs out to mmu-hash64.c and the version for 32-bit hash MMUs to mmu-hash32.c Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
diff --git a/target-ppc/mmu-hash32.c b/target-ppc/mmu-hash32.c index 50f8c54..c0e5742 100644 --- a/target-ppc/mmu-hash32.c +++ b/target-ppc/mmu-hash32.c
@@ -304,8 +304,9 @@ } -int ppc_hash32_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, int rw, int access_type) +static int ppc_hash32_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, + target_ulong eaddr, int rw, + int access_type) { bool real_mode = (access_type == ACCESS_CODE && msr_ir == 0) || (access_type != ACCESS_CODE && msr_dr == 0); @@ -329,6 +330,18 @@ } } +hwaddr ppc_hash32_get_phys_page_debug(CPUPPCState *env, target_ulong addr) +{ + mmu_ctx_t ctx; + + if (unlikely(ppc_hash32_get_physical_address(env, &ctx, addr, 0, ACCESS_INT) + != 0)) { + return -1; + } + + return ctx.raddr & TARGET_PAGE_MASK; +} + int ppc_hash32_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw, int mmu_idx) {
diff --git a/target-ppc/mmu-hash32.h b/target-ppc/mmu-hash32.h index 8f1f2a9..8f10e0d 100644 --- a/target-ppc/mmu-hash32.h +++ b/target-ppc/mmu-hash32.h
@@ -4,8 +4,7 @@ #ifndef CONFIG_USER_ONLY int pte32_is_valid(target_ulong pte0); -int ppc_hash32_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, int rw, int access_type); +hwaddr ppc_hash32_get_phys_page_debug(CPUPPCState *env, target_ulong addr); int ppc_hash32_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw, int mmu_idx);
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c index 32825ff..427b095 100644 --- a/target-ppc/mmu-hash64.c +++ b/target-ppc/mmu-hash64.c
@@ -436,8 +436,9 @@ return ret; } -int ppc_hash64_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, int rw, int access_type) +static int ppc_hash64_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, + target_ulong eaddr, int rw, + int access_type) { bool real_mode = (access_type == ACCESS_CODE && msr_ir == 0) || (access_type != ACCESS_CODE && msr_dr == 0); @@ -451,6 +452,18 @@ } } +hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr) +{ + mmu_ctx_t ctx; + + if (unlikely(ppc_hash64_get_physical_address(env, &ctx, addr, 0, ACCESS_INT) + != 0)) { + return -1; + } + + return ctx.raddr & TARGET_PAGE_MASK; +} + int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw, int mmu_idx) {
diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h index 3a53e61..665d3b0 100644 --- a/target-ppc/mmu-hash64.h +++ b/target-ppc/mmu-hash64.h
@@ -6,8 +6,7 @@ #ifdef TARGET_PPC64 void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env); int ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs); -int ppc_hash64_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, - target_ulong eaddr, int rw, int access_type); +hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr); int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw, int mmu_idx); #endif
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c index 287334f..818f1b5 100644 --- a/target-ppc/mmu_helper.c +++ b/target-ppc/mmu_helper.c
@@ -1310,11 +1310,6 @@ #endif switch (env->mmu_model) { - case POWERPC_MMU_32B: - case POWERPC_MMU_601: - ret = ppc_hash32_get_physical_address(env, ctx, eaddr, rw, access_type); - break; - case POWERPC_MMU_SOFT_6xx: case POWERPC_MMU_SOFT_74xx: if (real_mode) { @@ -1331,14 +1326,6 @@ } break; -#if defined(TARGET_PPC64) - case POWERPC_MMU_64B: - case POWERPC_MMU_2_06: - case POWERPC_MMU_2_06d: - ret = ppc_hash64_get_physical_address(env, ctx, eaddr, rw, access_type); - break; -#endif - case POWERPC_MMU_SOFT_4xx: case POWERPC_MMU_SOFT_4xx_Z: if (real_mode) { @@ -1383,6 +1370,22 @@ { mmu_ctx_t ctx; + switch (env->mmu_model) { +#if defined(TARGET_PPC64) + case POWERPC_MMU_64B: + case POWERPC_MMU_2_06: + case POWERPC_MMU_2_06d: + return ppc_hash64_get_phys_page_debug(env, addr); +#endif + + case POWERPC_MMU_32B: + case POWERPC_MMU_601: + return ppc_hash32_get_phys_page_debug(env, addr); + + default: + ; + } + if (unlikely(get_physical_address(env, &ctx, addr, 0, ACCESS_INT) != 0)) { return -1; }