)]}'
{
  "commit": "f62cafd4c87fad7bb9b9544b4cf4991d34764b11",
  "tree": "a334a34281af602744fff638a5e3a0e9b7280ed0",
  "parents": [
    "78dbbbe4dff95369c63bf77ee0df23371e1d6602"
  ],
  "author": {
    "name": "Sebastian Ottlik",
    "email": "ottlik@fzi.de",
    "time": "Tue Sep 10 19:09:32 2013 +0100"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Tue Sep 10 19:09:32 2013 +0100"
  },
  "message": "target-arm: fix ARMv7M stack alignment on reset\n\nWhen the initial SP is loaded from the vector table on ARMv7M systems the two\nleast significant bits are ignored as the stack is always aligned at a four byte\nboundary (see ARM DDI 0403C, B1.4.1 and B1.5.5). So far QEMU did not ignore\nthese bits leading to a stack alignment inconsitent with real hardware for\nbinaries that rely on this behaviour. This patch fixes this issue by masking the\ntwo least significant bits when loading the SP.\n\nSigned-off-by: Sebastian Ottlik \u003cottlik@fzi.de\u003e\nReviewed-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\nMessage-id: 1378286595-27072-1-git-send-email-ottlik@fzi.de\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "827e28ee4ded2862d34289617c6de3d0fa5c0280",
      "old_mode": 33188,
      "old_path": "target-arm/cpu.c",
      "new_id": "09206b5971f326d61be3b6566f8e036b66bf736c",
      "new_mode": 33188,
      "new_path": "target-arm/cpu.c"
    }
  ]
}